PEP/8 Machine Language Simulator
Instruction Specifier Instruction Addressing Modes Status Bits
0000 0000 Stop execution NA
0001 100r Bitwise invert r NA NZ
0001 110r Arithmetic shift left r NA NZVC
0001 111r Arithmetic shift right r NA NZC
0010 000r Rotate left r NA C
0010 001r Rotate right r NA C
0011 0aaa Decimal input trap d NZV
0011 1aaa Decimal output trap d, i
0100 1aaa Character input d
0101 0aaa Character output d, i
0111 raaa Add to r d, i NZVC
1000 raaa Subtract from r d, i NZVC
1001 raaa Bitwise AND to r d, i NZ
1010 raaa Bitwise OR to r d, i NZ
1100 raaa Load r from memory d, i NZ
1101 raaa Load byte from memory d, i NZ
1110 raaa Store r to memory d
1111 raaa Store byte r to memory d
